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The 8X300 is a microprocessor produced and marketed by Signetics starting 1976 as a second source for the SMS 300 by Scientific Micro Systems, Inc.〔8X300 Design Guide, Signetics Corporation November 1980, DSPG document 80-102〕〔Fast 8-bit bipolar microprocessor, David Edwards, ELECTRONICS Australia, March 1978〕〔Signetics /SMS 300 Pact, Microcomputer Digest vol. 2, No. 11, May 1976〕 Although SMS developed the SMS 300 / 8X300 products, Signetics was the sole manufacturer of this product line. In 1978 Signetics purchased the rights to the SMS300 series and renamed the SMS300 to 8X300 It was designed to be a fast microcontroller and signal processor, and because of this differs considerably from conventional NMOS logic microprocessors of the time. Perhaps the major difference was that it was implemented with bipolar Schottky transistor technology, and could fetch, decode and execute an instruction in only 250 ns. Data could be input from one device, modified, and output to another device during one instruction cycle. In 1982, Signetics released an improved and faster version, the 8X305. This processor went on to become very popular in military applications and was second-sourced by Advanced Micro Devices as the AM29X305. Eventually, production rights were sold to Lansdale Semiconductor Inc., who still offers the 8X305 to this day. == Architecture == The device was supplied in a 50-pin DIL ceramic package, and ran from a single 5V supply rail. An external pass transistor was required to complete an on-chip voltage regulator, which supplied 3V to selected areas of the chip. This helped to maintain the total current drain of the chip to less than 450mA. Clock requirements were met by connecting an 8 MHz crystal directly to two pins. Alternatively, out of phase signals from an external clock generator could be used. A second unique feature is a dedicated 13 bit address and 16 bit databus to access program memory, allowing 8192 16-bit program words to be directly addressed. This allowed ROM / PROM program memories to be directly connected without further hardware. A second combined 8-bit address/data bus- the interface vector (IV) bus, was used for data and I/O. Two control signals - WC (write command) and SC (select command) determined the state of the IV bus as follows: * SC=1, WC=0 I/O address is being output on the IV bus * SC=0, WC=1 I/O data is being output on the IV bus * SC=0, WC=0 I/O input data is being expected on the IV bus A further two signals; LB (left bank select) and RB (right bank select) effectively doubled the IV bus address space, and were most often used to switch between RAM memory in one bank and I/O ports in the other. Another unusual feature was that rather than execute mask, rotate, shift and merge instructions in the arithmetic logic unit (ALU), as is the case with most microprocessors, the 8X300 had separate mask, rotate, shift and merge units. Data could therefore be rotated, masked, modified, shifted and merged (in that order), all in one instruction cycle. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Signetics 8X300」の詳細全文を読む スポンサード リンク
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